1. Field of the Invention
This invention generally relates to computer-implemented methods for inspecting and/or classifying a wafer. Certain embodiments relate to a method that includes determining one or more defect detection parameters based on a non-spatially localized characteristic of a wafer and/or classifying a wafer based on a combination of a non-spatially localized characteristic of the wafer and a spatially localized characteristic of the wafer.
2. Description of the Related Art
The following description and examples are not admitted to be prior art by virtue of their inclusion in this section.
Fabricating semiconductor devices such as logic and memory devices typically includes processing a specimen such as a semiconductor wafer using a number of semiconductor fabrication processes to form various features and multiple levels of the semiconductor devices. For example, lithography is a semiconductor fabrication process that typically involves transferring a pattern to a resist arranged on a semiconductor wafer. Additional examples of semiconductor fabrication processes include, but are not limited to, chemical-mechanical polishing, etch, deposition, and ion implantation. Multiple semiconductor devices may be fabricated in an arrangement on a semiconductor wafer and then separated into individual semiconductor devices.
Inspection processes are used at various steps during a semiconductor manufacturing process to detect defects on wafers to promote higher yield in the manufacturing process and thus higher profits. Inspection has always been an important part of fabricating semiconductor devices such as integrated circuits. However, as the dimensions of semiconductor devices decrease, inspection becomes even more important to the successful manufacture of acceptable semiconductor devices because smaller defects can cause the devices to fail. For instance, as the dimensions of semiconductor devices decrease, detection of defects of decreasing size has become necessary since even relatively small defects may cause unwanted aberrations in the semiconductor devices.
Metrology processes are also used at various steps during a semiconductor manufacturing process to monitor and control the process. Metrology processes are different than inspection processes in that, unlike inspection processes in which defects are detected on a wafer, metrology processes are used to measure one or more characteristics of the wafer that generally cannot be determined using inspection tools. For example, metrology processes are used to measure one or more characteristics of a wafer such as a dimension (e.g., line width, thickness, etc.) of features formed on the wafer during a process such that the performance of the process can be determined from the one or more characteristics. In addition, if the one or more characteristics of the wafer are unacceptable (e.g., out of a predetermined range for the characteristic(s)), the measurements of the one or more characteristics of the wafer may be used to alter one or more parameters of the process such that additional wafers manufactured by the process have acceptable characteristic(s).
There are, however, a number of disadvantages to using metrology processes and tools to measure one or more characteristics of a wafer for process monitoring and control applications. For example, most metrology tools are relatively slow, particularly compared to inspection systems. Therefore, metrology processes are often performed at one location or a limited number of locations on wafers such that metrology results may be acquired in a relatively expedient manner. However, many processes used to manufacture semiconductor devices produce wafers that have characteristic(s) that vary across the surface of the wafers. As such, using metrology measurements performed at one location or a limited number of locations on a wafer may not provide sufficient information about the characteristic(s) of the wafers such that the process can be accurately monitored and controlled. Furthermore, using metrology tools to measure characteristics across the wafer for inline monitoring and control applications is not feasible due to the time in which such measurements can be performed. In particular, metrology measurements performed by currently available metrology tools such as surface roughness, resistivity, film thickness, etc. are not suitable for high sampling of wafers for inline monitoring since the measurements will impact (e.g., increase) cycle time in production.
Attempts have been made to try to use the output generated by inspection systems to determine metrology-like characteristics of wafers. For example, typically, inspection systems are configured with a number of collectors or channels. Each of these collectors or channels is able to capture multiple characteristics of the inspection surface, including, but not limited to, particles and defects of varying shapes and sizes, scratches, surface roughness, film thickness, film composition, film residue, material crystallinity, surface optical constants, nano-feature characteristics, pattern linewidths, and previous process or patterning parameters. While convenient and cost-effective, detecting multiple surface characteristics with a single collector or channel can be sub-optimal. For instance, point defects can scatter substantially strongly into a dark field (DF) collector in some cases, and dynamic range limitations of hardware or software may not permit optimal detection of a different wafer characteristic with that particular collector (e.g., relatively low amplitude, relatively long spatial frequency variations of surface roughness).
In many DF inspection systems, the background surface scattering (haze) or pattern noise is utilized to determine a threshold, either global or local, for defect detection. Defects are often particles, pits, scratches, missing material, or other features tightly confined in at least one spatial dimension. The number, type, size, and/or spatial location of the defects detected by this threshold operation are then recorded, and from this information, a determination of an overall attribute of the wafer (e.g. quality) is made.
In the above described method, many wafer characteristics measurable by the inspection system are largely ignored in dispositioning the wafer. These characteristics can include surface roughness, morphology, film thickness, film composition, film residue, and other previous process-induced changes across the wafer surface. In some cases, these characteristics are utilized for “off-line” analysis after inspection. The utilization and/or data processing of these low spatial frequency characteristics is often independent of the high spatial frequency (e.g., point defect) sample characteristics.
Accordingly, it would be advantageous to develop computer-implemented methods for inspecting and/or classifying a wafer that include determining one or more defect detection parameters based on a non-spatially localized characteristic of a wafer and/or classifying a wafer based on a combination of a non-spatially localized characteristic of the wafer and a spatially localized characteristic of the wafer.